High Speed Level Shifter Design for Low Power Applications Using 45nm Technology

As the need of handheld devices such as cell phones, speakers, cameras etc., is growing, low power consumption has important design issues for integrated circuits. Level Shifter is an interfacing circuit which can interface low core voltage to high inputoutput voltage. In order to achieve reduction in power consumption and delay, the proposed level shifter named Single Supply Level Shifter (SSLS) has been designed .In this paper single supply level shifter for low power high speed application have been presented and it shows better performance in terms of power consumption , delay as compared to conventional level shifter . All the circuits are simulated at transistor level using Cadence Virtuoso Tool at 45nm technology with VDD = 1.8V and T = 270 C.